Fast IO Buffer Modeling Using Neural Network Methods

摘要：

This paper provides an overview of a fast modeling approach for modeling the nonlinear IO buffers for signal integrity based simulation and design of high-speed electronic interconnect and packages. Techniques based on artificial neural network (ANN) modeling are developed, where the neural network is trained to learn from IO buffer data, and trained neural network becomes fast models representing the buffer during signal integrity simulation and design. The ANN approach is more accurate than typical empirical models, and is faster than detailed models such as detailed transistor-level or physics-based models.

作者: Q.J. Zhang Y. Cao I. Erdin

作者单位: Carleton University, Ottawa, Ontario, Canada Celestica Design Services, Ottawa, Ontario, Canada

会议类型: 国际会议

会议名称: 2010 11th International Conference on Electronic Packaging Technology & High Density Packaging(2010 电子封装技术与高密度封装国际会议)

会议地点: 西安

会议语种:英文

页码: 666-669

在线出版日期: 2010-08-16（万方平台首次上网日期，不代表论文的发表时间）