会议专题

Study on Process of Embedded Passives Based on FR4 Substrate Series

The fabrication of embedded passives represents a promising solution for system in package (SiP) regarding the reduction of size and assembly costs. But the thermo-mechanical deformation caused by residual stress generated from embedded passives processing have a significant impact on reliability of embedded passives. Due to the complication of embedded passives processing, there are several challenges in simulating the process of embedded passives, such as time-variation structures and boundary conditions. In this study, the finite element model of embedded capacitor is developed and employed to simulate the process of embedded passives with the application of element birth and death technology. The results represent that the maximum displacement take place at the outermost substrate after the process. In addition, the stress concentration is also found in the micro-vias. And then the stress field of process simulation is the initial stress field of the subsequent finite element analysis, the reliability of embedded capacitor is studied by coupling residual stress with accelerated thermal cycling. Comparative analysis of simulation result and experimental result, the results show that the micro-via in the lateral substrate has been obvious deformed, which will result in signal integrity problems and other reliability problems. In addition, the stress concentration is also found in the micro-vias. In the subsequent uncoupling analysis, an assumption made for the finite element analysis is that there is not residual stress in the embedded substrate. The result shows that that the maximum deformation did not take place at the micro-via of substrate, which is not accord with practice and results of coupling analysis. So in the study of process and thermo-mechanical reliability, residual stress of embedded process must be considered.

Weiyang Qiu Kailin Pan Dongmei li Jing Liu

School of Mechanical and Electrical Engineering, Guilin University of Electronic Technology No.1 Jinji Road, Guilin, China, 541004

国际会议

2010 11th International Conference on Electronic Packaging Technology & High Density Packaging(2010 电子封装技术与高密度封装国际会议)

西安

英文

815-818

2010-08-16(万方平台首次上网日期,不代表论文的发表时间)