A High-Efficiency Cascaded Multilevel Class-D Amplifier with FPGA Based on Sliding Mode Control

摘要：

A novel switch-mode power amplifier based on a cascaded multicell multilevel circuit topology is introduced in the paper. The article lays emphasis on the design of the sliding mode controller of a multilevel class-D power amplifier and its parameters. The multilevel class-D power amplifier’s multi-channel PWM gate circuit based on Field Programmable Gate Array (FPGA) is developed. The principle of the phase-shifted PWM control is described, operating these with which gives higher output power and produces an improved output voltage spectrum and significantly lowers output current-ripple. The research results show that this kind of amplifier significantly increases the system bandwidth, provides the system with fast following performance and stability, high efficiency, no matter the system is under resistive load or bridge rectifier load.

作者: Ying Zhang QingDe Meng Yaohua Li Ling Cai

作者单位: Naval Academy of Armament,Beijing 100161 CHINA. Institute of Electrical Engineering,Chinese Academic of Science,Beijing 100071 CHINA.

会议类型: 国际会议

会议名称: The 3rd International Symposium on Systems and Control in Aeronautics and Astronautics(第三届航空航天系统与控制国际会议 ISSCAA 2010)

会议地点: 哈尔滨

会议语种:英文

页码: 88-92

在线出版日期: 2010-01-08（万方平台首次上网日期，不代表论文的发表时间）