A Reconfigurable Video Moving Target Detection IP Core
Tabs paper designs a reconfigurable video MTD IP core, which established in XUP Virtes-II Pro development system platform. The design takes System Generator for the development tool, which is a system-level modeling tool developed by Xilinx Inc, to built a reconfigurable video MTD algorithm in MATLAB/Simulink environment, which is available for the FPGA platform. Then the algorithm is solidified as the hardware structure and is achieve in the form of IP core to achieve the purpose of IP reuse. The experiment has testified that the video MTD IP core meet the purpose of hardware acceleration and realtime video MTD. During the whole algorithm development process, we dont need to understand and use RTL-level hardware description language, and gives full play to the maximum performance of FPGAbased DSP. It improves system reliability and design flexibility, and has high availability.
Reconfigurable FPGA IP core Video MTD
Liming Wu Qi Wang
Faculty of Information Engineering, Guangdong University of Technology, Guangzhou, 510006, China
国际会议
2010 International Conference on Digital Manufacturing and Automation(2010 数字制造与自动化国际会议 ICDMA 2010)
长沙
英文
104-108
2010-12-18(万方平台首次上网日期,不代表论文的发表时间)