Data Processing Technology of Virtual Logic Analyzer Based on FPGA

摘要：

A method to implement the data processing technology of Virtual logic analyzer based on FPGA. VHDL is used in programing each functional model according the moethod of top-down,so the controlling flow is discussed also. The programme and simulation figures of some FPGA models are completed in the integration circumstance of MAX+plus to realize varied signal trigger and data storage function.

关键词： FPGA Virtual logic analyzer signal trigger data storage VHDL

作者: Zhao Zengrong

作者单位: Electronical Department of Hebei Normal University, Shijiazhuang, Hebei, 050016, China

会议类型: 国际会议

会议名称: 2010 International Conference on Digital Manufacturing and Automation(2010 数字制造与自动化国际会议 ICDMA 2010)

会议地点: 长沙

会议语种:英文

页码: 458-460

在线出版日期: 2010-12-18（万方平台首次上网日期，不代表论文的发表时间）