Optimization Techniques for A DSP Based H.264 Decoder
In this paper, two kinds of optimization techniques were proposed to enhance the performance of H.264 decoder that based on a DSP processor. One approach is to transfer reference data via DMA with a novel approach, which can utilize external bus efficiently. The other approach is to perform the block-based de-blocking filter, which minimizes the times of external memory access. The experimental results show that the proposed solution can improve the H.264 decoding speed by almost 58％. The optimized H.264 decoder can achieve the CIF @25Hz video decoding on a Blackfin 533 processor when operating at 526MHz clock.
H.264 decoder optimization MC filter
Honghua Hu Derong Chen
School of Mechatronical Engineering Beijing Institute of Technology Beijing, China
国际会议
2010 2nd International Conference on Signal Processing System(2010年信号处理系统国际会议 ICSPS 2010)
大连
英文
649-652
2010-07-05（万方平台首次上网日期，不代表论文的发表时间）