High-Speed Data Acquisition System Based on FPGA/SoPC

摘要：

This paper designs a high-speed data acquisition system based on a field-programmable gate array (FPGA). The system has the advantages of configurable data acquisition channels, high accuracy and high speed. A system on a programmable chip (SoPC) technique is utilized to implement the hardware design of the processor. The analog to digital converter (ADC) adopted in the system is a high-speed chip, THS1206, which is used to collect four channels analog voltage signal. When the system works in continuous conversion mode, the maximum conversion rate for single channel is 6MSPS and the maximum conversion rate for four channels is 1.5MSPS. This paper also describes the interface diagram of AD converter module, and takes advantage of Quartus Ⅱ and Nios Ⅱ development software to test the system performance. Experiments show that the system can accurately complete the real-time data acquisition task.

关键词： FPGA SoPC high-speed data acquisition system NiosⅡ

作者: Wang Fei Wu Zhijie Chen Hong Xi Yi

作者单位: State Key Laboratory of Automobile Dynamic Simulation,Jilin University,Changchun 130025,China;Depart Department of Control Science and Engineering,Jilin University,Changchun 130025,China

会议类型: 国际会议

会议名称: 2011 10th International Conference on Electronic Measurement & Instruments(第十届电子测量与仪器国际会议 ICEMI2011)

会议地点: 成都

会议语种:英文

页码: 24-27

在线出版日期: 2011-08-16（万方平台首次上网日期，不代表论文的发表时间）