会议专题

Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL

This article provides a fabricating method to improve significantly both of the breakdown voltage and specific on-resistance in high resistivity drift region LDMOS using by both of the PBL doping under the source terminal and the gate extended field plate technologies. The insertion of PBL aims at the reduction of bulk current caused by the impact-ionization-generated holes while the gate extended field plate were be used to shift the impact ionization region from N-drift region surface near the gate side down toward the junction between the P-body and N-drift region to increase the breakdown voltage due to the increase of maximum depletion in the N-drift region.

impact ionization breakdown voltage on-resistance LDMOS field plate TCAD simulation.

Tsai Minchin

Department of Computer Science and Information Engineering,Asia University

国际会议

2011 10th International Conference on Electronic Measurement & Instruments(第十届电子测量与仪器国际会议 ICEMI2011)

成都

英文

1105-1109

2011-08-16(万方平台首次上网日期,不代表论文的发表时间)