会议专题

Implementation of the Finite Automaton Public Key Cryptosystem on FPGA

Hardware implementation aspects of the finite automaton public key cryptosystem are discussed in this paper. A general architecture of the multiplication of a square matrix on a vector over GF(q) is presented in the paper. Our design was implemented on Altera EP3C5E144C8N of the Cyclone III FPGA family. The performance of finite automaton public key cryptosystems is mainly appointed by the efficiency of the underlying finite field arithmetic. The results are compared with reported reconfigurable hardware implementations of RSA. Proposed hardware realization of cryptographic system allows organizing pipeline calculations.

Dina Satybaldina Altynbek Sharipbayev Аigul Adamova

L. Gumilyov Eurasian National University, Munaitpasov str. 5 010000, Astana, Kazakhstan

国际会议

13th International Conference on Enterprise Information System(第13届企业信息系统国际会议 ICEIS 2011)

北京

英文

1568-1574

2011-06-08(万方平台首次上网日期,不代表论文的发表时间)