The Hardware Design and Simulation of Kalman Filter Based on IP Core and Time-sharing Multiplex
Kalman filter Is widely applied in engineering due to its real time recursive algorithm, while it is hard to implement hardware with traditional device in some actual systems with hign performances hi real time and hi flexible and convenient implementation. Applying plentiful resources of FPGA and its flexibility and parallel computation , according to the first timing later circuit mind, this paper designed a floating Kalman filter by using the topdown synchronous design method based on FPGA. The design uses time-sharing multiplex technology in IP cores and modules so as to save resources and to implement hardware conveniently on the premise that the system has met the real-time requirement Taking the precision improvement of the GPS as its application, the Modelsim simulation results show that the designed floating Kalman filter is real time and easy to realize and simultaneously saves hardware resources, so it has practical value.
Kalman filter FPGA IP core timesharing multiplex
BaiXue Wang De-ming Tu Jun-jun Zhao Bu-hui
School of Electrical and Information Engineering Jiangsu Universiy Zhenjiang, China
国际会议
深圳
英文
266-269
2011-03-28（万方平台首次上网日期，不代表论文的发表时间）