A Novel VLSI Architecture of 8x8 Integer DCT Based on H.264/AVC FRext

摘要：

H.264FRext video coding standard uses integer 8x8 discrete cosine transform (DCT) algorithm. It can preserve the detail image information better. Compared with the traditional cosine transform, integer DCT can avoid the mismatch problem, increase the computation speed, and is more feasible for hardware implementation. This paper proposes a novel two-dimension DCT hardware structure based on the fast papilionaceous algorithm and the reusable row and column transform unit. The proposed hardware architecture is described by Verilog HDL language and implemented with SMIC 0.18un2 technology. Experiments show that the maximum delay of circuit is 2.74833ns after synthesis, and the area of the system is 94283.4844 |im2, which can satisfy the system requirments to both circuit area and speed.

关键词： H.264FRext integer DCT fast papilionaceous algorithm VLSI

作者: Chan Jiang Ningmei Yu Meihua Gu

作者单位: Department of Electronic Engineering Xian University of Technology XVan, Shaanxi Province, China Department of Electronic Engineering Xian University of Technology XVan, Shaanxi Province,China Department of Electronic Engineering Xian University of TechnologyXVan, Shaanxi Province, China

会议类型: 国际会议

会议名称: 2010 Third International Symposium on Knowledge Acquisition and Modeling(第三届知识获取与建模国际研讨会 KAN 2010)

会议地点: 武汉

会议语种:英文

页码: 59-62

在线出版日期: 2010-10-20（万方平台首次上网日期，不代表论文的发表时间）