A Generic Architecture of Complete Intrinsic Evolvable Digital Circuits

摘要：

Eovnbe Hardware is inspired by natural evolution and based on Evolutionary algorithms, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is necessary to evaluate a large number of different circuits which is normally most efficiently undertaken in reconfigurable hardware. For digital circuits design, field programmable gate arrays are very applicable. Thus, this paper presents a generic virtual reconfigurable architecture for designing complete intrinsic evolvable digital circuits on FPGAs. The experimental results show that it is a promising approach towards autonomous and on-line reconfigurable machines capable of adapting to realworld problems.

关键词： Evolvable Hardware Evolutionary Algo rithms Intrinsic FPGA VRA

作者: Peng Ke Zhichao Cao Xin Nie

作者单位: State Key Laboratory of Software Engineering Wuhan University Wuhan, Hubei Province, China Power Supply Company ofPuyang Puyang,Henan Province,China

会议类型: 国际会议

会议名称: 2010 Third International Symposium on Knowledge Acquisition and Modeling(第三届知识获取与建模国际研讨会 KAN 2010)

会议地点: 武汉

会议语种:英文

页码: 379-382

在线出版日期: 2010-10-20（万方平台首次上网日期，不代表论文的发表时间）