Jitter Test of Multiphase DTTL

摘要：

Speed and precision are always two critical factors to tradeoff in SDH jitter measurement. According to existing jitter test of single-phase data transition tracking loop(DTTL), a multi-phase DTTL jitter testing circuit is presented in this paper based on Xilinx chips. Xilinx chips have a feature of delay programmable configuration. This method makes use of it, and divides the square wave signal with the input jitter in a jitter measurement part into N copies. The copies are respectively configurated suitable delay, and with the local reference signal for phase comparison, the sum of all comparison outputs as a jitter error. Under the same sampling period, because the sampling points that take part in phase comparison are increased, so the sampling frequency and measurement accuracy indirectly improves. Theoretical analysis and simulation results show that the measurement accuracy for multi-phase jitter error has corresponding times than for single phase jitter error. The method eases limitation of the Xilinx chip clock and increases SDH jitter measurement accuracy.

关键词： multiphase optical communication jitter test Xilinx

作者: Xinwei Li Lei Shen Zhijin Zhao

作者单位: College of Communication Engineering Hangzhou Dianzi University Hangzhou 310018,China

会议类型: 国际会议

会议名称: 2010 Second Asia-Pacific Conference on Information Processing(2010年第二届亚太地区信息处理国际会议 APCIP 2010)

会议地点: 南昌

会议语种:英文

页码: 586-589

在线出版日期: 2010-09-17（万方平台首次上网日期，不代表论文的发表时间）