Design of image interpretation and data-processing system based on SOPC
In order to follow the development of image interpretation and data-processing system in photoelectric measurement equipments, a kind of hardware acceleration system is designed where MIMD distributed multi-processor architecture is used with SOPC technology. System hardware is composed of FPGA, SDRAM, SRAM, FLASH, and PCI bridge chip. Four Nios II embedded processors are integrated in a single FPGA chip, and communicate with each other by sharing memory. Experimental results indicate that the system meets the requirements of data-processing system in photoelectric measurement equipments and possesses practical significance for engineering applications.
photoelectric measurement image interpretation data-processing SOPC
WANG Zhi-qian LIU Zhao-rong XIE Mu-jun
Department of optics-electronics measure and control Changchun Institute of Optics, Fine Mechanics a Graduate University Chinese Academy of Sciences Beijing, China School of Electrical & Electronic Engineering Changchun University of Technology Changchun, China
国际会议
长春
英文
130-132
2010-08-24（万方平台首次上网日期，不代表论文的发表时间）