The Research of FPGA-based Loop Optimization Pipeline Scheduling Technology

摘要：

The loop pipeline scheduling is to schedule the operations in loop body to each pipeline stage; the scheduling results directly affect the maximum clock frequency and the resources consumed. As the pipeline scheduling is very flexible, therefore getting a relatively optimized scheduling is difficult. Based on pipeline scheduling types and scheduling principles, an optimized pipeline scheduling method is presented. The method takes into account circuit clock frequency, time interval to start pipeline and pipeline stages to get a higher performance hardware scheduling. Experiments show that it can both improve the clock frequency and reduce the time interval to start pipeline.

关键词： loop pipeline scheduling chaining operations full pipeline loop-carried dependence

作者: Jin Qu Rongcai Zhao Taogang Liu Dan Zhang Lin Han

作者单位: National Digital Switching System Engineering and Technological Research Center, Zhengzhou, Henan, China

会议类型: 国际会议

会议名称: 2010 International Conference on Computer and Communication Technologies in Agriculture Engineering(计算机与通信技术在农业工程国际会议 CCTAE 2010)

会议地点: 成都

会议语种:英文

页码: 426-429

在线出版日期: 2010-06-12（万方平台首次上网日期，不代表论文的发表时间）