GA-Based Floorplan-Aware Topology Synthesis of Application-specific Network-on-Chip

摘要：

Application-specific SoC requires an efficient interconnection topology which does not necessarily conform to regular topologies such as mesh etc. As NoC topology synthesis is an NP-hard problem, we present a genetic algorithm (GA) based technique to synthesize application specific NoC topology with system-level floorplan aware. The technique minimizes the power consumption and router resources while satisfying latency and bandwidth performance constraints. We validate our technique by showing the results of several benchmark applications. The proposed technique generates optimal topology within few minutes.

关键词： Application-Specific NoC genetic algorithms network-on-chip (NoC) topology synthesis

作者: Guoming Lai Xiaola Lin Siyan Lai

作者单位: School of Information Science and Technology,Sun Yat-sen University,Guangzhou, 510006, China Departm School oflnformation Science and Technology,Sun Yat-sen University,Guangzhou, 510006, China

会议类型: 国际会议

会议名称: 2010 IEEE International Conference on Intelligent Computing and Intelligent Systems(2010 IEEE 智能计算与智能系统国际会议 ICIS 2010)

会议地点: 厦门

会议语种:英文

页码: 554-558

在线出版日期: 2010-10-29（万方平台首次上网日期，不代表论文的发表时间）