Monte Carlo simulation of 9x9 Go game on FPGA
Monte Carlo (MC) simulation of 9x9 Go games was implemented on a field-programmable-gate-array (FPGA) device. Significant speedup of over MC simulations on general-purpose CPU and over the previous implementation on FPCA was realized, making brute-force search of the Go game tree possible. Fixed depth alpha-beta game tree searches of 3 to 5 plies were implemented, and their playing strengths were tested against GNU Go. The 3-ply search was carried out in full game tree, while the 4 and 5-ply searches were implemented on partial game tree spanned from pre-selected moves. The pre-selected moves were calculated on the host computer and passed to the FPGA chip before search starts. The combined FPGA and computer system demonstrated comparable playing strength against GNU Go 3.8.
Monte Carlo Go game alpha-beta FPGA
Gao haiying Wang fuming Lei wei Lin yun
School of Physics and Mechanical & Hectrical Engineering,Xiamen University,Xiamen,China
国际会议
厦门
英文
865-869
2010-10-29(万方平台首次上网日期,不代表论文的发表时间)