Implementing Sparse Matrix-Vector Multiplication using CUDA based on a Hybrid Sparse Matrix Format
The Sparse Matrix-Vector product (SpMV) is a key operation in engineering and scientific computing. Methods for efficiently implementing it in parallel are critical to the performance of many applications. Modern Graphics Processing Units (GPUs) coupled with the advent of general purpose programming environments like NVIDIAS CUDA, have gained interest as a viable architecture for data-parallel general purpose computations. Currently, SpMV implementations using CUDA based on common sparse matrix format have already appeared. Among them, the performance of implementation based on ELLPACK-R format is the best However, in this implementation, when the maximum number of nonzeros per row does substantially differ from the average, thread is suffering from load imbalance. This paper proposes a new matrix storage format called ELLPACK-RP, which combines ELLPACK-R format with JAD format, and implements the SpMV using CUDA based on it The result proves that it can decrease the load imbalance and improve the SpMV performance efficiently.
SpMV GPU CUDA matrix format ELLPACKRP
Wei Cao Lu Yao Zongzhe Li Yongxian Wang Zhenghua Wang
National Key Lab for Parallel and Distributed Processing National University of Defense Technology Changsha, China
国际会议
太原
英文
161-165
2010-10-22（万方平台首次上网日期，不代表论文的发表时间）