ANSYS-Based 3D-SoC Thermal Electric Coupling Model

摘要：

In order to thermal-design 3D-SoC, one novel thermal electric coupling ANSYS model is built with features on (1) unit type of SOLID69, (2) 6-die stack-layers, (3) innerdie Cu-line 1 ~ 3 as interconnect-complex level, (4) die current density converted into voltage across Cu-line, and (5) ITRS2007 data, for scanning out top-layer temperature decrease factors. Four key room temperature tendency decrease factors were grasped: (a) tc (copper interconnect thick), (b) tp (package thick), ? tsil (diel thick), and (d) kp (package thermal conductivity).

关键词： 3SD-SoC ANSYS thermal electric coupling model temperature decrease factors

作者: Li Zhihai Li Wenshi Li Wenshi

作者单位: School of Electronics and Information Engineering, Soochow University Suzhou, P.R.China Graduate School Tohoku University Sendai, A.A.A.6-6-01, Japan

会议类型: 国际会议

会议名称: The 2010 International Conference on Computer Application and System Modeling(2010计算机应用与系统建模国际会议 ICCASM 2010)

会议地点: 太原

会议语种:英文

页码: 337-339

在线出版日期: 2010-10-22（万方平台首次上网日期，不代表论文的发表时间）