The Modern DSP Implementation of α-β Flight Track Filter Algorithm

摘要：

This paper is using the basic theory of IIR digital filter and FPGA as hardware implementation to design α-β flight track filter algorithm to implement and realize a modern DSP model. And provide respectful data analysis and simulation results. The advantage of this model is simple and straight forward, pipeline to control easy, computation effective high, fast speed and realtime. This model can be used widely in high data rate radars real-time flight track filter application.

关键词： α-β flight track filter modern DSP FPGA IIR pipeline tree

作者: Chuan Sheng Chaofeng Mi

作者单位: Radar Engineering Dept., Missile Institute, Air Force Engineering University, Xi’an, China

会议类型: 国际会议

会议名称: 2010 The IET 3rd International Conference on Wireless,Mobile & Multimedia Networks(第三届IET无线移动及多媒体网络国际会议 ICWMMN 2010)

会议地点: 北京

会议语种:英文

页码: 274-276

在线出版日期: 2010-09-26（万方平台首次上网日期，不代表论文的发表时间）