Real-Time Implementation of Discrete Wavelet Transform on FPGA

摘要：

This paper presents a real-time architecture for forward/inverse wavelet transforms that take into account the group delays of the used filters. The main idea is based on the equalization of the filter path delays. The perfect reconstruction of this architecture was evaluated for various data widths. This architecture was implemented on FPGA using XUP Virtex-II Pro development board.

作者: Mohammed Bahoura Hassan Ezzaidi

作者单位: Department of Engineering,University of Quebec at Rimouski,300, all′ee des Ursulines,Rimouski, Qc, C Department of Applied Sciences,University of Quebec at Chicoutimi,550, boul.de l’Universit′e, Chicou

会议类型: 国际会议

会议名称: 2010 IEEE 10th International Conference on Signal Processing(第十届信号处理国际会议 ICSP 2010)

会议地点: 北京

会议语种:英文

页码: 191-194

在线出版日期: 2010-08-24（万方平台首次上网日期，不代表论文的发表时间）