Implementation of Advance Encryption Standard algorithm on FPGA for the protection of Remote Sensing Satellite

摘要：

Advanced Encryption Standard (AES) and state of art technology FPGAs (Field Programmable Gate Arrays) can be used together to mitigate the potential threats of interception of Satellite data and unauthorized access to the Satellite System. This paper discusses the implementation and verification of AES algorithm on Virtex 4 FPGA and its usage in the protection of Remote Sensing Satellite Data. The performance of the designed core has been verified by the Timing Simulation, on Chip Debugging and through Synthesized report. The analysis of designed core shows that this core can give throughput of 1579 Mbps and take less than 6 ％ resources of the FPGA, which make it suitable to be use in Remote Sensing Satellite.

关键词： Remote Sensing Satellite FPGA Throughput Modelsim ChipScope Pro.

作者: Muhammad Irshan khan Syed Musaddiq Ali Shah

作者单位: Assistant Manager SRDC-K1 SUPARCO Karachi,Pakistan SRDC-K1 SUPARCO Karachi,Pakistan

会议类型: 国际会议

会议名称: 2010 3rd IEEE International Conference on Computer Science and Information Technology(第三届IEEE计算机科学与信息技术国际会议 ICCSIT 2010)

会议地点: 成都

会议语种:英文

页码: 147-151

在线出版日期: 2010-07-07（万方平台首次上网日期，不代表论文的发表时间）