Dynamic Fault-tolerant Design for Array Processors Based on Immunology

摘要：

Inspired by the biological immunology principle and using its property of autonomy, learning and memory for reference, this paper focuses on the faulttolerant design method of array processors which has real-time detection and dynamic configuration capabilities, to improve the chips reliability by ensuring that when fault occurs in one or more of processor elements the chip can also work normally. This paper discusses the heterogeneous features of array processors, the structure of resource node and communication node. Research the fault-tolerance strategy of array processor, and the immune response mechanism of array processor, to achieve the realtime immune process of perception, training, response and feedback. This paper focuses on researching the structure and the algorithm of router switch unit with 90mm technology which has the dynamic faulttolerant function. It has the guiding significance on R&D of array processors for industry circles.

关键词： Array processor Dynamic fault-tolerant design Immunology principle

作者: WU Ze-jun WANG Xin-an LI Guo-liang

作者单位: The Key Laboratory of Integrated Microsystems,Shenzhen Graduate School,Peking University,Shenzhen.Ch The Key Laboratory of Integrated Microsystems,Shenzhen Graduate School,Peking University,Shenzhen,Ch

会议类型: 国际会议

会议名称: The 2nd IEEE International Conference on Advanced Computer Control(第二届先进计算机控制国际会议 ICACC 2010)

会议地点: 沈阳

会议语种:英文

页码: 16-20

在线出版日期: 2010-03-27（万方平台首次上网日期，不代表论文的发表时间）