High-Performance Computing for Embedded Systems Based on Heterogeneous Architectures
This paper aims to describe the proposal for a reconfigurable and heterogeneous computing architecture for digital signal processing on Embedded Systems, based on the cooperative use of DSP (Digital Signal Processor) and FPGA (Field-Programmable Gate Array). To validate the proposal, some scenarios has been developed for processing of the DCT (Discrete Cosine Transform). This algorithm has been one of the main elements involved in digital image compression, it has been adopted in various coding schemes, such as JPEG, and MPEGx H.26x.
DSP FPGA High Performance Computing Embedded Systems
Ericles Rodrigues Sousa Luis Geraldo Pedroso Meloni
School of Electrical and Computer Engineering State University of Campinas - UNICAMP Campinas, SP - School of Electrical and Computer EngineeringState University of Campinas - UNICAMPCampinas, SP - Br
国际会议
哈尔滨
英文
417-421
2011-01-18(万方平台首次上网日期,不代表论文的发表时间)