会议专题

Design of a Crosspoint Queued Router for a Micro-network in SoCs

Due to the advancement of manufacturing process for integrated circuits, more functional units can be integrated into a System on Chip (SoC). It causes the challenge of communication aspect in a SoC. Therefore, the design of Network on Chip (NoC) was proposed. Most research of NoC employs a kind of Input-Queued (IQ) switch architecture with VOQ (Virtual Output Queue) scheme. In this study, we apply a different switching architecture, Crosspoint Queued (CQ) switch architecture, in NoC to improve transmission throughput and delay between functional units. To increase performance, we use an Old Cell First (OCF) weighted matching algorithm for arbitrating contentions. We also use a simple routing scheme, X-Y routing, to route messages from source to destination. Further, the usage of the X-Y routing scheme can reduce the amount of buffer memory in the CQ router. Simulation results show that, applying the CQ switch architecture in NoC has better performance than traditional IQ-VOQ scheme in NoC.

NoC mesh router crosspoint queued

Wen-Fong Wang Jhih-Sian Li Ching-Sung Lu

Dept. of Information Engineering National Yunlin University of Science & Technology Douliu city, Yun Dept. of Information Engineering Tajen University of Science & Technology Yan-Pu, Pingtung, Taiwan

国际会议

2011 3rd International Conference on Advanced Computer Control(2011年IEEE第三届高端计算机控制国际会议 ICACC2011)

哈尔滨

英文

533-537

2011-01-18(万方平台首次上网日期,不代表论文的发表时间)