Large-scale MOSFET and Interconnect Circuit Simulation Using Iterated Timing Analysis and Transmission Line Time Step Control

摘要：

In modern circuit design community, to perform large-scale circuit simulation for MOSFET and interconnect circuits is an important subject. This paper presents an efficient and robust way to satisfy this requirement. It uses ITA (Iterated Timing Analysis) algorithm, serving as the main algorithm, and a transmission line calculation algorithm, serving as the interconnect calculator, to do the simulation task. More important, accelerating methods to fasten both ITA and the transmission line calculator also proposed in this paper. All presented methods have been implemented and tested to justify their efficiency and robustness.

关键词： circuit simulation relaxation-based algorithms transmission line Iterated Timing Analysis

作者: Chun-Jung Chen

作者单位: Department of Computer Science Chinese Culture University Taipei, Taiwan

会议类型: 国际会议

会议名称: 2010 International Conference on Signal and Information Processing(2010年IEEE信号与信息处理国际会议 ICSIP2010)

会议地点: 长沙

会议语种:英文

页码: 752-757

在线出版日期: 2010-12-14（万方平台首次上网日期，不代表论文的发表时间）