会议专题

Derivation of Optimal Test Set for Detection of Multiple Missing-Gate Faults in Reversible Circuits

Logic synthesis of reversible circuits has received considerable attention in the light of advances recently made in quantum computation. Implementation of a reversible circuit is envisaged by deploying several special types of quantum gates, such as iCNOT. Although the classical stuck-at fault model is widely used for testing conventional CMOS circuits, new fault models, namely single missing-gate fault (SMGF), repeated-gate fault (RGF), partial missinggate fault (PMGF), and multiple missing-gate fault (MMGF). have been found to be more suitable for modeling defects in quantum i-CNOT gates. This article presents an efficient algorithm to derive an optimal test set (OTS) for detection of multiple missing-gate faults in a reversible circuit implemented with t-CNOT gates. It is shown that the OTS is sufficient to detect all single missing-gate faults (SMGFs) and all detectable repeated gate faults (RGFs). Experimental results on some benchmark circuits are also reported.

Missing-gate faults quantum computing reversible logic testable design universal test set

Dipak K. Kole Hafizur Rahatnan Debesh K Das Bhargab B. Bhattacharya

Information Technology Department, Bengal Engineering & Science University, Shibpur, Howrah, India Dept. of Computer Sc. and Engg., Jadavpur University, Jadavpur, India ACM Unit, Indian Statistical Institute, Kolkata, India

国际会议

2010 19th IEEE Asian Test Symposium(第19届IEEE亚洲测试技术学术会议 ATS 2010)

上海

英文

33-38

2010-12-01(万方平台首次上网日期,不代表论文的发表时间)