On Selection of Testable Paths with Specified Lengths for Faster-Than-At-Speed Testing
Faster than at-speed testing provides an effective way to detect small delay defects (SDDs). It requires test patterns to be delicately classified into groups according to the delay of sensitized paths. Each group of patterns is applied at certain frequency. In this paper, we propose to generate tests for faster than at-speed testing using path delay fault (PDF) model and single path sensitization criterion. An effective path selection and grouping method is introduced, which could quickly and accurately identify paths whose delay falls into a given delay span. Several techniques are used to improve the efficiency of the testable path selection procedure. Experimental results on ISCAS89 benchmark circuits show that the proposed method could achieve high transition fault coverage and high test quality of SDDs with low CPU time.
faster-than at-speed testing testable path selection small delay defect
Xiang Fu Huawei Li Xiaowei Li
Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade
国际会议
2010 19th IEEE Asian Test Symposium(第19届IEEE亚洲测试技术学术会议 ATS 2010)
上海
英文
45-48
2010-12-01（万方平台首次上网日期，不代表论文的发表时间）