Performance Characterization of TSV in 3D IC via Sensitivity Analysis
In this paper, we propose a method that can characterize the propagation delays across the Through Silicon Vias (TSVs) in a 3D IC. We adopt the concept of the oscillation test, in which two TSVs are connected with some peripheral circuit to form an oscillation ring. Upon this foundation, we propose a technique called sensitivity analysis to further derive the propagation delay of each individual TSV participating in the oscillation ring - a distilling process. In this process, we perturb the strength of the two TSV drivers, and then measure their effects in terms of the change of the oscillation rings period. By some following analysis, the propagation delay of each TSV can be revealed. Monte-Carlo analysis of a typical TSV with 30％ process variation on transistors shows that the characterization error of this method is only 2.1％ with the standard deviation of 8.1％.
Jhih-WeiYou Shi-Yu Huang Ding-Ming Kwai Yung-Fa Chou Cheng-Wen Wu
Electrical Engineering Department, National Tsing Hua University, Taiwan Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiw Electrical Engineering Department, National Tsing Hua University, Taiwan Information and Communicati
国际会议
2010 19th IEEE Asian Test Symposium(第19届IEEE亚洲测试技术学术会议 ATS 2010)
上海
英文
389-394
2010-12-01（万方平台首次上网日期，不代表论文的发表时间）