Software-Based Self-Testing of Processors Using Expanded Instructions

摘要：

In this paper, an automatic test instruction generation (ATIG) technique using expanded instructions is presented for software-based selftesting (SBST) of processors. First, mappings between expanded instructions and signals are obtained through data mining, and they are used to impose value ranges of expanded instructions on component signals and generate instruction-level constraints. Second, virtual circuits are established based on the instruction-level constraints, and test patterns are generated for the constrained components. Third, test patterns are translated into test instructions according to the values of controlling signals and constraints for their mappings to instructions, and an SBST program is produced after assembling the test instructions. Experimental results on the Parwan processor show that the proposed ATIG technique can achieve 94.8％ stuck-at fault coverage, which is close to that of the full-scan test generation method. In addition, it can cut down 57％ test volume of the previous random pattern generation based SBST technique, while the test time reduces to one thirteenth of the previous SBST technique.

关键词： Software-Based Self-Test Automatic Test Instruction Generation Instruction-Level Constraint On-Line Test

作者: Ying Zhang Huawei Li Xiaowei Li

作者单位: Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade Key Laboratory of Computer System and Architecture, Institute of Computing Technology, Chinese Acade

会议类型: 国际会议

会议名称: 2010 19th IEEE Asian Test Symposium(第19届IEEE亚洲测试技术学术会议 ATS 2010)

会议地点: 上海

会议语种:英文

页码: 415-420

在线出版日期: 2010-12-01（万方平台首次上网日期，不代表论文的发表时间）