Advanced Technology for FPGAs

摘要：

Power management and high speed transceiver I/O demands are two major challenges for advanced field programmable gate array (FPGA) at 28nm node. To meet requirements, not only innovations in process technology but also co-optimization of process, circuit and system architecture are required. Advanced process technologies, such as high-k metal gate (HKMG) and enhanced strain engineering, significantly improves performance while reducing leakage power. With co-optimization of process, circuit, and architecture, 30％ lower total power is achieved for 28nm FPGAs vs. previous generations. With optimized analog/RF devices, high data rate of 28 Gbps transceivers are produced using a 28nm digital process.

作者: Qi Xiang

作者单位: Altera Corporation, 101 Innovation Drive, San Jose, CA 95134

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 58-61

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）