The Giga Hz 1 Mb Mask programmable ROM chip with SBD array, logic gate, and SRAM cores
SCMOS is a low cost, high capacity, high speed, high yield, and power saving VLSI device platform technology for microelectronics chips and modules. Benefits include: 1.Uses the complementary Low threshold Schottky Barrier Diodes (LtSBD or simply SBD). 2.Integrated the SBD and CMOS transistor as basic circuit elements for Analog, Logic, and Memory (ALM) macros. 3.Single power supply chip. Circuits provide both static and dynamic functions. 4.Uses the low cost CMOS Logic compatible processes, with extremely low power and high speed. 5.Provides Zero Stress Bias (ZSB) on selected blocks.
Augustine Chang
Golden Silicon Technology Mountain View, CA. USA, 94043
国际会议
上海
英文
154-158
2010-11-01(万方平台首次上网日期,不代表论文的发表时间)