A 2-Locking-Cycle Skew-Compensation Circuit with the Capability of Tracking Runtime-Variations

摘要：

The open-loop de-skewing circuits are traditionally used for fast clock synchronization, but they are unable to deal with the problems induced by run-time variations. This paper presents the design of a skew compensation circuit that can achieve fast lock-in and also perform maintenance operation after lock-in. This circuit is designed on top of the open-loop half-delay-line skew compensation circuit (HDSC) to get a lock-in time of two cycles, and extra circuits are added for monitoring the influence of runtime temperature and supply-voltage variations and maintaining the de-skewing effect.

作者: Chun-Yuan Cheng Jinn-Shyan Wang Yung-Chen Chien Yi-Ming Wang

作者单位: Dept. of EE/SOC Research Center, Natl Chung-Cheng University, Taiwan Dept. of EE, Natl Chi-Nang University, Taiwan

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 176-179

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）