Digital Calibration Implementation for Track-and-Hold Offset in a High-Speed Timing-Interleaved Folding and Interpolating Analog-to-Digital Converter

摘要：

A digital calibration implementation for track-andhold offset in a high-speed timing-interleaved folding and interpolating analog-to-digital converter is proposed in this paper. The spice simulation and measured results both show that the digital calibration technique can efficiently cancel the T/H offset and improve the linearity of the ADC.

关键词： Digital Calibration track-and-hold high-speed interpolation folding ADC

作者: Jinshan Yu Ruitao Zhang ZhengPing Zhang ongLu Wang Zhu Can Zhang Lei Yu Zhou

作者单位: National Laboratory of Analog IC s,Chongqing 400060, China 12th Institute o/CETC, Beijing 100016, C National Laboratory of Analog IC s, Chongqing 400060, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 202-204

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）