Radiation Hardened 256K CMOS SOI SRAM
A radiation hardened 256K-bit asynchronous SRAM is presented. It is fabricated by a 0.5-micron, radiation hardened CMOS PDSOI process with 3 layers of metal. It features 800uA stand-by current, 42ns access time, 300K rad(Si) total dose tolerant and 1.5xi01trad (Si)/s dose rate survivability. A 28-pin DIP package is used. The circuit operates with ambient temperature from -55 to +125℃ and power supply from 4.5 to 5.5V.
Zhao Kai Gao Jiantou Liu Zhongli Yu Fang Li Ning Yang Bo Wang Ningjuan Xiao Zhiqiang Hong Genshen
Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, P.RXhina State Key Laborat Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, P.RXhina The 58th Institute, CETC, Wuxi 214035, P.R.China
国际会议
上海
英文
225-226
2010-11-01(万方平台首次上网日期,不代表论文的发表时间)