Chip and Package Co-design for High Performance Mixed IC

摘要：

In this paper, we propose an efficient approach to reduce the effect of the Simultaneous Switching Noise (SSN) for mixed System on Chip (SoC). In order to validate the approach, we have designed a 14-bits 100MHz pipeline ADC as an example. Finite Element Method (FEM) and Method of Moment (MoM) are chose to do the electromagnetic extraction of package and bond-wires separately. The proposed approach combines the equivalent lump model with the ADC chip to perform co-design. A RC network is designed to suppress the SSN. As a result of measurement, the SFDR of the ADC s output can reach 84dB at an input clock of 100MHz with an input signal of 10MHz, which coincides with the expectation by this approach.

作者: Yu-Han Gao Lin-Tao Liu Liang Chen Xing-Fa Huang Ru-Zhang Li Ming-Yuan Xu

作者单位: National Labs of Analog Integrated Circuits, Chongqing 400060, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 239-241

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）