会议专题

Charge Sharing Clock Scheme for High Efficiency Double Charge Pump Circuit

A charge sharing clock scheme is proposed to feed a 5-stage double charge pump circuit. By reusing the charges in charging or discharging the parasitic capacitance during the pumping process, dynamic power loss is able to be reduced by nearly a half. Under IV supply, simulation results show a maximum 10% efficiency increase, and the ripple noise is also reduced by a half comparing to the conventional charge pumps.

Mengshu Huang Leona Okamura Tsutomu Yoshihara

Graduate School of Information, Production and Systems, Waseda University Fukuoka, Japan, 808-0135

国际会议

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

上海

英文

248-250

2010-11-01(万方平台首次上网日期,不代表论文的发表时间)