A Large-Scale Reconfigurable Analog Processor Based on Field Programmable Analog Array Technology
A large-scale Reconfigurable Analog Processor (RAP), based on Field Programmable Analog Array (FPAA), and assisted by Configurable Digital Block (CDB), is introduced. Fine-grained Configurable Analog Blocks (CABs) are used in the FPAA structure for flexibility. Almost all analog functions can be realized through RAP and the digital parts further enhanced the processing ability. Low power consumption design is achieved in the large-scale RAP. The chip was manufactured in 0.18μm CMOS technology. The die area is 13.76mm2. An example of the adaptive filtering is implemented, with current consumption of 0.77mA.
Wenhui Fu Jun Jiang Xi Qin Siyu Yang Ting Yi Zhiliang Hong
State Key Laboratory of ASIC and Systems, Fudan University, Shanghai, PRC
国际会议
上海
英文
406-408
2010-11-01(万方平台首次上网日期,不代表论文的发表时间)