A Monolithic High Frequency Digitally Controlled Buck Converter in 0.13μm CMOS Process
This paper described a digitally controlled Buck converter. In this converter, the compensator implements the classic linear PID control law by the fixed-point algorithm. A proposed verification method is performed in Simulink environment. The structure of low area and power cost Ring ADC and high resolution DPWM is also introduced, respectively. The consistent mathematic and Spice simulation result demonstrate the design validity of the whole system.
Hou Sijian Ma Xiao Zhen Shaowei Luo Ping Zhang Bo
State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science & Technology of China Cheng Du, China
国际会议
上海
英文
421-423
2010-11-01(万方平台首次上网日期,不代表论文的发表时间)