AES Implementation Based on a Configurable VLIW DSP

摘要：

This paper presents the design and implementation of an Advanced Encryption Standard (AES) algorithm using configurable DSP processor design tools. Beginning with the NIST specification, a software algorithm is developed and then hardware implementations are profiled and tuned by adding or removing configurable computing units. Finally, RTL implementations are generated. Performance is compared to commercial implementations. The DSP exploration process allowed rapid development of increasingly better implementations of the algorithm.

作者: Xu Deqiang Cary Ussery Chen Hongyi

作者单位: Institute of Microelectronics Tsinghua University Beijing 100084 XHmicro, Gulou East Street 213 Beijing 100009

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 536-538

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）