A Novel Low-Offset Dynamic Comparator for High-speed Low-voltage Pipeline ADC

摘要：

A novel low-offset dynamic comparator for high-speed low-voltage analog-to-digital converters has been proposed. It features larger input swing, lower operating voltage, less sensitivity to common mode voltage, and simple relationship between input and reference. Simulation results verified these advantages over the conventional comparators.

作者: Jinda Yang Xu Cheng Yawei Guo Zhang Zhang Xiaoyang Zeng

作者单位: State-Key Laboratory of ASIC&System, Fudan University, Shanghai 201203, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 548-550

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）