A Programmable Gain Amplifier with DC-Offset Cancellation for Power Line Communication

摘要：

This paper presents an improved DC-offset cancellation (DCOC) circuit for programmable-gain amplifier (PGA) in power line communication. It is a speed-enhanced and low-noisy method by using currentmode feedback. The output DC-offset can be reduced from several hundred millivolts to less than 5mV over 64 dB gain range. Furthermore, this proposed technique does not bring in excessive design complexity or large chip area by reusing master-slave configuration that already existed in the system. The circuit is designed in 0.18μm CMOS technology.

作者: Chaoli Zhang Di Zhu Guanzhong Huang Peiyuan Wan Ping Lin

作者单位: Beijing Embedded System Key Lab, Beijing University of Technology, Beijing 100124, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 551-553

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）