An optimized low swing CMOS driver-receiver for on-chip interconnects

摘要：

In this paper a low swing driver-receiver pair (lhoslp) for driving signals is proposed to optimize the energy dissipation and delay of global interconnect lines. The simulation, performed based on 1V 0.13nm CMOS technology with HSPICE, for signal transmission along a wire- length of 10 mm. The simulation results show lhos-lp is 18％ and 14％ better than other similar signaling schemes (lhos-db and lhos-lhos) and consumes 17％ lower energy than lhos-lhos and it has similar energy consumption respect to lhos-lp. Also this circuit performs 28％ and 20％ better than lhoslhos and lhos-db in a point of energy delay product.

作者: Mina Fallah Adib Abrishamifar

作者单位: Department of electronics, Islamic Azad University of Qazvin, Qazvin, Iran Member IEEE, Iran University of Science and Technology, Tehran, Iran

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 560-562

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）