Design of a High Linearity Low Noise Mixer for Low Voltage Application

摘要：

A 1.2V Gilbert mixer with improved linearity and noise figure is presented. To improve the linearity, an optimum gate bias is applied to the transconductance stage, and a series LC network resonating around 2fLo is implemented at the common source nodes of the switch quad. Analysis shows that the flicker noise performance also benefits from the series resonating network. The 2.1 GHz mixer fabricated with 0.13μ m CMOS technology is demonstrated. Linearity measurement from two tone tests shows that the IMD3 is improved over a wide range of the input power level. Compared with the conventional Gilbert mixer, the IMD3 is improved by 13.1dB and the DSB noise figure measured at 1MHz intermediate frequency is improved by 3.7dB. The mixer consumes 3.5mA current from a 1.2V supply voltage.

作者: Song Hu Weinan Li Yumei Huang Zhiliang Hong

作者单位: State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 653-655

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）