A Novel Methodology of Layout Design by Applying Euler Path

摘要：

A new methodology of layout design applying Euler path is proposed. By separating the pFET array and nFET array away, and then mapping them to be diffusion graphs, we can reduce the operational complexity when solving Euler path and generating the stacked layout. The means that making use of adjacency matrix of diffusion graph to identify Euler path and adding dummy edge in advance could make Atallah algorithm simplified. In addition, some optimization to the Atallah algorithm is also investigated.

作者: Shaoan Yan Dongen Li Liming Wang Yongguang Xiao Minghua Tang

作者单位: Key Laboratory of Low Dimensional Materials & Application Technology (Xiangtan University), Ministry of Education, Xiangtan, Hunan, 411105, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 818-820

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）