Mapping of Pipeline Flow Chart onto Mesh-based Multi-core NoC Architecture

摘要：

Among current outstanding research problems in NoC Design, mapping application onto NoC is one of the core issues to be explored. In this paper, wepropose two methods for mappinga pipelined flow chart onto mesh-based NoC system: Communication Length Concerned (CLC) method and Space Restricted (SR) method after a simple pre-process. The former significantly reduces the latency and energy consumption in inter-core communication while latter method provides a tradeoff for run-time mapping based on the former one. Results show that, compared with normal mapping, the CLC method reduces about 43.3％ and 28.6％ in communication latency and energy consumption, respectively; while the SR method reduces about 37.6％ communication latency and 24％ energy consumption. The two methods discussed in this paper could be used as guidance for mapping pipeline flow charts on homogenous mesh-based NoC architectures.

作者: Haofan Yang Ruijin Xiao Liang Liu Ming-e Jing Zhiyi Yu Xiaoyang Zeng Dian Zhou

作者单位: State Key Laboratory of ASIC and System, Fudan University, Shanghai 200433, China School of Computer Science, Fudan University

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 824-826

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）