A New Two-Dimensional Analytical Model for the Fully-Depleted SOI Four-Gate Transistor

摘要：

Based on the exact solution of the Poissons equation, a new two-dimensional (2-D) model for the silicon-on-insulator (SOI) fully-depleted four-gate transistor(G4-FET) is successfully developed. The model is verified by its good agreement with the numerical simulation of the device simulator. For the threshold voltage degradation, it is found that the lateral coupling effects between lateral gate and front gate and negative vertical coupling effects between back gate and front gate will pull up the threshold voltage significantly. On the other hand, for some junction-gate bias, the positive vertical coupling effects between back gate and front gate will reduce the threshold voltage. The model not only offers the physical insight into the device physics but also provides a basic guidance for designing the the silicon-on-insulator (SOI) four-gate transistor (G4-FET).

作者: T. K. Chiang

作者单位: Dept. of Electrical Engineering, National University of Kaoshiung, Kaoshiung, Taiwan

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 831-835

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）