Mixed-Mode Simulation-Design for IEC-ESD Protection
Electrostatic discharge (ESD) protection becomes essential to advanced integrated circuits (IC). Very fast IEC-ESD failure and protection design are emerging challenges for contemporary ICs, particularly for consumer and portable electronics. This paper presents a new mixed-mode IEC-ESD simulation-design method, which involves process, device, circuit and system level simulation to accurately address the ultra-fast IEC ESD phenomena. The new IEC-ESD design technique allows ESD design optimization and prediction. Experimental results are depicted to validate the new design technique.
Fei Yao Xin Wang Shijun Wang Bo Qin Albert Wang Hongyi Chen Siqiang Fan Bin Zhao
CitrusCom Semiconductor, China Dept. of Electrical Eng., University of California, Riverside, CA 92521, USA Dept. of Microelectronics, Tsinghua University, China Fairchild Semiconductor, USA
国际会议
上海
英文
1596-1599
2010-11-01(万方平台首次上网日期,不代表论文的发表时间)