Trigger Voltage Walk-in Effect of ESD Protection Device in HVCMOS

摘要：

Transmission Line Pulse (TLP) curve of high voltage SCR-LDMOS (SCR embedded in LDMOS) is measured under various repetitious TLP stress to evaluate its Electrostatic Discharge (ESD) protection capability. Results show that trigger voltage has walk-in behavior. TCAD simulation indicates its mechanism involved is explained by a base push-out effect dominated melt filament growth, that turns a robust ESD clamp into a fragile device susceptible to trigger voltage collapse.

关键词： ESD SCR-LDMOS Trigger Voltage Walk-in

作者: Meng Miao Shurong Dong Mingliang Li Yan Han Bo Song Fei Ma

作者单位: Department of Information Science and Electronics Engineering, Zhejiang University, Hangzhou, China

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 1627-1629

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）