Zero-Temperature-Coefficient of Planar and MuGFET SOI Devices

摘要：

The Zero Temperature Coefficient (ZTC) is investigated experimentally in planar and standard/biaxially strained triple-gate nFinFETs fabricated on SOI wafers. In this work a simple model to analyze the behavior of the gate-source voltage at the Zero Temperature Coefficient point (Vzrc) is proposed in the linear and saturation operation regions. The analysis takes into account the temperature variations of the threshold voltage and the transconductance degradation factor. Although simple, the model predictions are in good agreement with the experimental results.

作者: J. A. Martino L. M. Camillo L. M. Almeida E. Simoen C. Claeys

作者单位: LSI/PSI/USP, University of Sao Paulo, Brazil Imec, Kapeldreef 75, B-3001 Leuven, Belgium Imec, Kapeldreef 75, B-3001 Leuven, Belgium E.E. Dept., KU Leuven, Leuven, Belgium

会议类型: 国际会议

会议名称: 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology(第十届固态和集成电路技术国际会议 ICSICT-2010)

会议地点: 上海

会议语种:英文

页码: 1753-1756

在线出版日期: 2010-11-01（万方平台首次上网日期，不代表论文的发表时间）